Hitachi 6309 Description

Introduction

The HD63B09EP microprocessor by Hitachi, is a MC68B09E compatible chip containing additional registers and an additional instruction set. The 6309 was thought to be a flakey chip though, because it would sometimes crash or change the values of registers when it encountered an addressing mode or opcode invalid to the 6809. This was later found to be an extended instruction set and a feature that would trap some programming errors and jump to a specified location in memory.

Hitachi licensed the rights of the 6809 instruction set from Motorola to make a 6809 compatible chip. When they finished the design, they found there was a lot of unused space in the chip. With this in mind they added extra registers and expanded on the instruction set, but due to the licensing agreement with Motorola, they were unable to release the information about the extra features.

Not only did the chip have an expanded instruction set, but it also had a native mode that would run many of the instructions in fewer clock cycles and a mode select for the FIRQ (Fast Interrupt ReQuest) that would enable it to opperate the same as the IRQ.

In fact, all new instructions will execute in emulation mode, which was originally seen when 'illegal' 6809 instructions produced odd results when run on a computer with a 6309 installed.

The additional instruction set was first written about in the April 1988 issue of "Oh!FM", a Japanese magazine, and was later brought to the attention of the 6809 community by Hirotsugu Kakagawa. He followed up a series of '6809-6309 differences' messages on comp.sys.m6809 by posting a detailed explanation of the new features and instructions of the 6309. This opened a whole new door to those who wished to use the 6309 in place of the 6809.

The information in this reference is of technical nature and makes no attempt to teach assembly language programming. It is ONLY a technical reference guide for those who already know assembly and wish to use these features in their programs. Although all of the opcodes for the 6309/6809 chip are listed in the appendix, only the additional features supplied by the 6309 will be discussed in detail.

Summary of Features

  • More registers:
    • one 8/16 bit 'zero' register
    • Two 8bit accumulators.
    • One 16bit concatenated register
    • One 16bit value register.
    • One 8bit mode/error register.
    • One 32bit concatenated register
  • Two modes: MC68B09E emulation mode and HD63B09EP native mode.
  • Reduced execution cycles when running in native mode.
  • Many additional instructions.
  • Error trapping of illegal instructions and zero divisions.

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